IBM is upgrading its latest z and LinuxONE mainframes with the new Telum processor and an innovative accelerator to enhance AI and data-heavy workloads performance.
The newly introduced processor, the IBM Telum II, features increased memory and cache over its predecessor and incorporates a specialized data processing unit (DPU) for IO acceleration, alongside improved on-chip AI acceleration features.
Utilizing Samsung’s 5nm technology, the Telum II is equipped with eight high-performance cores operating at 5.5GHz. IBM reports a 40% boost in on-chip cache capacity, with virtual L3 and virtual L4 expanding to 360MB and 2.88GB, respectively.
“The computational capability of each accelerator is projected to quadruple, achieving 24 trillion operations per second (TOPS). However, TOPS alone do not capture the full picture,” noted Christian Jacobi, IBM Fellow and CTO, IBM Systems Development, and Elpida Tzortzatos, IBM Fellow and CTO of z/OS and AI on IBM Z and LinuxONE, in a blog discussing the new processor.
“The key lies in the architectural design of accelerators and the optimization of the AI ecosystem layered on these accelerators. For AI acceleration in production enterprise workloads, the architecture must be purpose-built. Telum II is crafted to allow model runtimes to operate concurrently with demanding enterprise applications, achieving high throughput and low-latency inferencing.”
With the advanced configuration, forthcoming IBM Z systems could feature up to 32 Telum II processors and 12 IO cages. Each cage could manage up to 16 PCIe slots, enabling the system to handle up to 192 PCIe cards. Enhanced custom I/O protocols aim to improve availability, conduct error checks, and facilitate virtualization, catering to extensive bandwidth needs while providing redundancy and multi-pathing to guard against simultaneous multiple failures.
“We have embedded new computing primitives to enhance support for large language models within the accelerator. These innovations aim to assist a wider spectrum of AI models, enabling thorough analysis of structured and textual data,” according to Jacobi and Tzortzatos.
The initial Telum processor launched by IBM in 2021 featured an integrated AI accelerator for inferencing. With the commencement of the latest generation, there is a significant boost in the capabilities of the AI accelerator on the Telum II processor. Additionally, Telum II incorporates a new dedicated DPU specialized for IO acceleration, which simplifies system operations and may boost the performance of critical components, as reported by IBM.
From a networking and I/O viewpoint, shifting from using a double-port fiber connection card to a quadruple-port card is advantageous. This permits the consolidation of the Open Systems Adapter (OSA) Express, which handles a variety of networking protocols, and RDMA over Converged Ethernet (RoCE) Express at a system level. Michael Becht, chief engineer and architect for IBM Z I/O channels, alongside Susan M. Eickhoff, director at IBM Z processor development, anticipate these changes to begin with the new generation of IBM Z due in early 2025. They claim this upgrade will allow clients to retain their previous I/O setups while occupying less data center space, therefore enhancing their infrastructure efficiently.
Furthermore, the Telum II processor will be complemented by a new device named the Spyre Accelerator, designed to boost AI processing power.
The Spyre Accelerator is set to include 1TB of memory and 32 AI accelerator cores, which will follow a similar design to those integrated within the Telum II processor. According to Jacobi and Tzortzatos, multiple Spyre Accelerators can be interconnected with the I/O Subsystem of IBM Z using PCIe technology. This integration could significantly enhance the available acceleration capabilities.
Taken together, the IBM Telum II and the Spyre Accelerator are described as a crucial development in mainframe technology, stated by Steven Dickens, chief technology advisor at The Futurum Group.
“The introduction of this advanced chip and AI technology by IBM for use in mainframes marks a significant milestone for enterprise customers,” explained Dickens.
The innovative processor technologies focus on enhancing AI development and managing workloads more efficiently. Moreover, Big Iron benefits other sectors that handle numerous transactions, enhancing both performance and energy conservation, noted Tina Tarquinio, vice president of product management for IBM Z and LinuxONE.
“The applications for Spyre and its accompanying accelerator cover virtually all business sectors,” Tarquinio elaborated. “For instance, IBM leverages it to enhance our internal AI-driven HR processes. Moreover, the upcoming IBM z series will continue leading in system resilience and introduces eight nines of availability security, setting a benchmark as the sole quantum-safe system available.”
Analysts believe the introduction of the new Telum 11-based mainframes will significantly influence not only the development of enterprise AI but also areas such as database management and cloud architectures, including both distributed and hybrid models.
“Considering the fundamental attributes of these servers, they are poised to excel in I/O performance,” commented Dickens. “This will enhance the efficiency of critical applications like Oracle or MongoDB run by clients.”
According to Dickens, these technological advancements will allow users to offload transactional workloads from the main CPU to an acceleration unit, thus facilitating more extensive evaluations and processing related to machine learning, AI, and generative AI.
“Besides aiding in code generation, this robust AI-enabled mainframe platform, comprising a combination of chips, cards, and software, will prove beneficial in numerous processes including but not limited to credit rating assessments, fraud detection, regulatory compliance, financial transactions, and simulation of document processing,” shared Patrick Moorhead, the founder, CEO, and principal analyst at Moor Insights & Strategy.
“If you’re an enterprise and have a mainframe, you likely are using it for mission-critical apps that require the highest level of resilience and security. Previously in AI, enterprises would move the data off the mainframe to a GPU server, do work on it, then send it back on the mainframe,” Moorhead said. “That’s not efficient or fast and less secure for apps like credit ratings, fraud detection, and compliance.”
IBM’s Jacobi also discussed the enhancements in code security and compliance due to the new AI support.
“Many clients manage tens or hundreds of millions of lines of code in their applications, and they are particularly concerned and cautious about their code base,” Jacobi mentioned. “This code base represents a codified business method for operating sectors like insurance or banking, constituting invaluable intellectual property for them.”
“When clients undertake AI processes on such extensive code architectures, they prefer executing it within the secure confines of the mainframe instead of analyzing it abroad. Now, this has become feasible,” Jacobi added.
“With the Spyre, we can cluster up to eight cards together to get to the memory size and compute capacity to run generative workloads on that code. And we’ll be integrating that with our higher-level stack products like Watson Code Assistant for Z with optimized models that are trained and tuned to have the knowledge that is necessary to do kind of mainframe code refactoring and mainframe code explanation,” Jacobi said.
The Telum II processor will be the central processor powering IBM’s next-generation IBM Z and IBM LinuxONE platforms and is expected to be available in 2025, according to IBM. The Spyre Accelerator, currently in tech preview, is also expected to be available in 2025.
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